Product Summary

The THC63LVD1023B is a transmitter. The device is designed to support Single Link transmission between Host and Flat Panel Display and Dual Link transmission between Host and Flat Panel Display up to 1080p/QXGA resolutions. The THC63LVD1023B converts 67bits of CMOS/TTL data into LVDS (Low Voltage Differential Signaling) data stream. The transmitter can be programmed for rising edge or falling edge clocks through a dedicated pin, and support double edge inputs. In Dual Link, the transmit clock frequency of 135MHz, 67bits of RGB data are transmitted at an effective rate of 945Mbps per LVDS channel. Using a 135MHz clock, the data throughput is 1.05Gbytes per second. In Asynchronous mode, the THC63LVD1023B has 2 independent 35Bits Transmitter.

Parametrics

THC63LVD1023B absolute maximum ratings: (1)Supply Voltage (VCC): -0.3V ~ +4.0V; (2)CMOS/TTL Input Voltage: -0.3V ~ (VCC + 0.3V); (3)LVDS Driver Output Voltage: -0.3V ~ (VCC + 0.3V); (4)Output Current: -30mA ~ 30mA; (5)Junction Temperature: +125℃; (6)Storage Temperature Range: -55 ~ +125℃; (7)Lead Temperature (Soldering, 4sec): +260℃; (8)Maximum Power Dissipation: 1.15W.

Features

THC63LVD1023B features: (1)Wide dot clock range suited for TV Signal (480i-1080p), PC Signal (VGA-QXGA) TTL/CMOS Input: 10-150MHz LVDS Output: 20-135MHz; (2)PLL requires No external components; (3)Single/Dual TTL IN,Single/Dual LVDS OUT; (4)Double edge input for Single TTL IN/Dual LVDS OUT; (5)Input port SW for Single TTL IN/Dual LVDS OUT; (6)Asynchronous Dual TTL IN/Dual LVDS OUT; (7)Clock edge selectable; (8)3 LVDS data mapping for simplifying PCB layout.; (9)Pseudo Random pattern generation circuit; (10)Supports Reduced swing LVDS for Low EMI; (11)Power down mode; (12)Low power single 3.3V CMOS design; (13)Backward compatible with THC63LVD1023; (14)144pin LQFP.

Diagrams

THC63LVD1023B block diagram

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